1. Field of the Invention
The present invention relates to the design of electronic circuits, and in particular, relates to the design of CMOS integrated circuits.
2. Discussion of Related Art
A reference bias current can be generating from the difference in the base-emitter voltages of two bipolar transistors of different current densities. One such reference bias current generation circuit is disclosed in the article "A Quad CMOS Single-Supply Op Amp with Rail-to-Rail Output Swing" by D. Monticelli, IEEE Journal of Solid-State Circuits, vol.sc-21, No. 6, December 1986, pp. 1026-34.
A good reference disclosing general techniques for generating supply-independent or temperature-independent bias currents is Analysis and Design of Analog Integrated Circuits, by P. Gray and R. Meyer, second edition, pp. 275-289, published by John Wiley & Sons.
Another example of a reference bias current generation circuit is shown in FIG. 6. As shown in FIG. 6, reference bias current generation circuit 600 includes NPN bipolar transistors 601 and 602. In circuit 600, transistors 601 and 602 are designed to have different emitter areas. Thus, when both transistors 601 and 602 are conducting in the linear region, a difference (".delta.V.sub.BE ") between their base-emitter voltages results. The emitter terminal of transistor 601 is coupled to a current source 608 by resistor 603. The emitter terminal of transistor 602 is coupled to current source 609. Current sources 608 and 609 are designed to sink substantially the same current. In circuit 600, the voltage on node 607 (at the emitter terminal of transistor 602) and the voltage on node 603 are forced to be equal by the high gain of an operational amplifier 604, which provides a feedback signal at terminal 610 to control current sources 608 and 609. If the voltage at node 606 is slightly higher than the voltage at node 607, the bias voltage at current source 608 is increased to equalize the voltages at nodes 606 and 607. Conversely, if the voltage at node 606 is slightly lower than the voltage at node 607, the bias voltage at current source 608 is decreased to equalize the voltages at nodes 606 and 607. In equilibrium, the voltage .delta.V.sub.BE is dropped across resistor 603. The current i.sub.ref in current sources 608 and 609 is determined by the size of resistor 603, and is given by: ##EQU1## where R is the resistance of resistor 603. A ratioed current mirror can be used to generate a current equal to i.sub.ref or a current proportional to .delta.V.sub.BE.
In both of the prior art reference bias current generation circuits discussed above, a reference bias current arising from the difference in base-emitter voltages of two bipolar transistors is generated by imposing such voltage difference across a resistor. However, if a small reference bias current is preferred, such a resistor can occupy unreasonably large silicon real estate in an integrated circuit implementation. For example, in circuit 600 of FIG. 6 discussed above, if the emitter ratio between transistors 601 and 602 is 9:1, a .delta.V.sub.BE of 57 millivolts results in one implmentation. In that implementation, to provide a reference current i.sub.ref of 0.2 microamps, resistor 603 is required a resistance of 285K. Such resistance is achieved in that implmentation only with an uneconomically large resistor.
Alternatively, the resistor in the prior art reference bias current generation circuit can be replaced by a field effect transistor (FET) operating in the non-saturation or "triode" region. Such an FET would require a much smaller silicon real estate than a resistor conducting the same amount of current. However, the use of an FET has at least two disadvantages. First, the threshold voltage (V.sub.T) of such a transistor is known to vary substantially with variations in the manufacturing process. Consequently, the equivalence resistance attainable by such FET varies over a wide range, leading to large variation in the generated bias current. Secondly, the threshold voltage of such as FET is known to have a negative coefficient. Consequently, the bias current generated by such an FET also has a negative temperature coefficient, which is undesirable for most amplifier applications.
Thus, a reference bias current generation circuit which is relatively insensitive to process variations and which has a positive temperature coefficient is desired.